1. Field of the Invention
The present invention relates generally to memories storing redundant binary codes, an arithmetic unit and a discrete cosine transformer using such a memory. The invention particularly relates to a memory permitting power consumption to be reduced, and an arithmetic unit and a discrete cosine transformer using such a memory.
2. Description of the Related Art
Referring to FIG. 1, in an arithmetic unit, a general arithmetic operation portion 100 performs an operation based on a received input X and output data from a memory 200 and produces an output X.
The output value of memory 200 is represented in binary notation. If, for example, the bit number of the output value of memory 200 is 12, an output value of 724 is output as 001011010100, the binary representation of 724. A negative output value of -256 is output as 111100000000, the 2' complement of the corresponding absolute number.
As input X changes or an input subject to an arithmetic operation at arithmetic operation portion 100 changes, the output data of memory 200 necessarily changes. As described above, since the output data of memory 200 is in binary notation, the number of changes in bits in the output data of the memory (hereinafter referred to as "transition number") is large. This leads to increased power consumption. This also promotes wear-out in the arithmetic unit, resulting in a shorter life of the unit.